#
# Makefile Template
# Version 1.0
#

include Makefile.options

CC := gcc
OUTPUT := output
APP_OUT := $(OUTPUT)/$(APP)

all: $(APP_OUT)

$(APP_OUT): $(SRC)
	@echo "\n  * Building $(APP)"
	@mkdir -p $(OUTPUT)
	@echo "    -- Compiling $@" 
	@$(CC) $(SRC) -o $(APP_OUT)
	@echo "    -- Done"

clean:
	@echo "\n  * Cleaning $(APP)..."
	@rm -rf $(OUTPUT)
	@echo "    -- Done"

